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Instruction Cheatsheet

Instruction Description Syntax Bytes M-cycles T-states Type Addressing
MVI R = <8bit> MVI R, <8bit> 2 2 7 Data Transfer Immediate
MVI M[HL] = <8bit> MVI M, <8bit> 2 2 7 Data Transfer Immediate
MOV Rd = Rs MOV Rd, Rs 1 1 4 Data Transfer Register
MOV Rd = M[HL] MOV R, M 1 2 7 Data Transfer Indirect
MOV M[HL] = Rd MOV M, R 1 2 7 Data Transfer Indirect
LXI Rp = <16bit> LXI Rp <16bit> 3 3 10 Data Transfer Immediate
LDA A = M[<16bit>] LDA <16bit> 3 4 13 Data Transfer Direct
STA M[<16bit>] = A STA <16bit> 3 4 13 Data Transfer Direct
LDAX A = M[Rp] LDAX Rp 1 2 7 Data Transfer Indirect
STAX M[Rp] = A STAX Rp 1 2 7 Data Transfer Indirect
LHLD HL = M[<16bit>,+1] LHLD <16bit> 3 5 16 Data Transfer Direct
SHLD M[<16bit>,+1] = HL SHLD <16bit> 3 5 16 Data Transfer Direct
PCHL PC = HL PCHL 1 1 6 Data Transfer Register
SPHL SP = HL SPHL 1 1 6 Data Transfer Register
ADD A = A + R ADD R 1 1 4 Arithmetic Register